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# at86rf230b.h

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    00001 /* THIS FILE IS GENERATED by ds2reg.py FROM INPUT Templates/at86rf230b.txt */
    00002
    00003 /* Copyright (c) 2008 Axel Wachtler
    00004    All rights reserved.
    00005
    00006    Redistribution and use in source and binary forms, with or without
    00007    modification, are permitted provided that the following conditions
    00008    are met:
    00009
    00010    * Redistributions of source code must retain the above copyright
    00011      notice, this list of conditions and the following disclaimer.
    00012    * Redistributions in binary form must reproduce the above copyright
    00013      notice, this list of conditions and the following disclaimer in the
    00014      documentation and/or other materials provided with the distribution.
    00015    * Neither the name of the authors nor the names of its contributors
    00016      may be used to endorse or promote products derived from this software
    00017      without specific prior written permission.
    00018
    00019    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    00020    AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
    00021    IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
    00022    ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
    00023    LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
    00024    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
    00025    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
    00026    INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
    00027    CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
    00028    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    00029    POSSIBILITY OF SUCH DAMAGE. */
    00030
    00031 /* $Id: at86rf230b.txt,v 1.11 2009/11/25 08:59:18 joerg_wunsch Exp $ */
    00037 #ifndef AT86RF230B_H
    00038 #define AT86RF230B_H (1)
    00039
    00040 /* === Includes ============================================================== */
    00041
    00042 /* === Externals ============================================================= */
    00043
    00044 /* === Types ================================================================= */
    00045
    00046 typedef uint8_t trx_ramaddr_t;
    00047 typedef uint8_t trx_regval_t;
    00048 typedef uint8_t trx_regaddr_t;
    00049
    00050 /* === Macros ================================================================ */
    00052 #define RG_TRX_STATUS (0x1)
    00053
    00054   #define SR_CCA_DONE 0x1,0x80,7
    00055
    00056   #define SR_CCA_STATUS 0x1,0x40,6
    00057
    00058   #define SR_TRX_STATUS 0x1,0x1f,0
    00059     #define P_ON (0)
    00060     #define BUSY_RX (1)
    00061     #define BUSY_TX (2)
    00062     #define RX_ON (6)
    00063     #define TRX_OFF (8)
    00064     #define PLL_ON (9)
    00065     #define SLEEP (15)
    00066     #define BUSY_RX_AACK (17)
    00067     #define BUSY_TX_ARET (18)
    00068     #define RX_AACK_ON (22)
    00069     #define TX_ARET_ON (25)
    00070     #define RX_ON_NOCLK (28)
    00071     #define RX_AACK_ON_NOCLK (29)
    00072     #define BUSY_RX_AACK_NOCLK (30)
    00073
    00074 #define RG_TRX_STATE (0x2)
    00075
    00076   #define SR_TRAC_STATUS 0x2,0xe0,5
    00077     #define TRAC_SUCCESS (0)
    00078     #define TRAC_SUCCESS_DATA_PENDING (1)
    00079     #define TRAC_CHANNEL_ACCESS_FAILURE (3)
    00080     #define TRAC_NO_ACK (5)
    00081     #define TRAC_INVALID (7)
    00082
    00083   #define SR_TRX_CMD 0x2,0x1f,0
    00084     #define CMD_NOP (0)
    00085     #define CMD_TX_START (2)
    00086     #define CMD_FORCE_TRX_OFF (3)
    00087     #define CMD_RX_ON (6)
    00088     #define CMD_TRX_OFF (8)
    00089     #define CMD_PLL_ON (9)
    00090     #define CMD_RX_AACK_ON (22)
    00091     #define CMD_TX_ARET_ON (25)
    00092
    00093 #define RG_TRX_CTRL_0 (0x3)
    00094
    00095   #define SR_PAD_IO 0x3,0xc0,6
    00096
    00097   #define SR_PAD_IO_CLKM 0x3,0x30,4
    00098     #define CLKM_2mA (0)
    00099     #define CLKM_4mA (1)
    00100     #define CLKM_6mA (2)
    00101     #define CLKM_8mA (3)
    00102
    00103   #define SR_CLKM_SHA_SEL 0x3,0x8,3
    00104
    00105   #define SR_CLKM_CTRL 0x3,0x7,0
    00106     #define CLKM_no_clock (0)
    00107     #define CLKM_1MHz (1)
    00108     #define CLKM_2MHz (2)
    00109     #define CLKM_4MHz (3)
    00110     #define CLKM_8MHz (4)
    00111     #define CLKM_16MHz (5)
    00112
    00113 #define RG_PHY_TX_PWR (0x5)
    00114
    00115   #define SR_TX_AUTO_CRC_ON 0x5,0x80,7
    00116
    00117   #define SR_TX_PWR 0x5,0xf,0
    00118
    00119 #define RG_PHY_RSSI (0x6)
    00120
    00121   #define SR_RX_CRC_VALID 0x6,0x80,7
    00122
    00123   #define SR_RSSI 0x6,0x1f,0
    00124
    00125 #define RG_PHY_ED_LEVEL (0x7)
    00126
    00127   #define SR_ED_LEVEL 0x7,0xff,0
    00128
    00129 #define RG_PHY_CC_CCA (0x8)
    00130
    00131   #define SR_CCA_REQUEST 0x8,0x80,7
    00132
    00133   #define SR_CCA_MODE 0x8,0x60,5
    00134
    00135   #define SR_CHANNEL 0x8,0x1f,0
    00136
    00137 #define RG_CCA_THRES (0x9)
    00138
    00139   #define SR_CCA_ED_THRES 0x9,0xf,0
    00140
    00141 #define RG_IRQ_MASK (0xe)
    00142
    00143   #define SR_MASK_BAT_LOW 0xe,0x80,7
    00144
    00145   #define SR_MASK_TRX_UR 0xe,0x40,6
    00146
    00147   #define SR_MASK_TRX_END 0xe,0x8,3
    00148
    00149   #define SR_MASK_TRX_START 0xe,0x4,2
    00150
    00151   #define SR_MASK_PLL_UNLOCK 0xe,0x3,0
    00152
    00153 #define RG_IRQ_STATUS (0xf)
    00154
    00155   #define SR_BAT_LOW 0xf,0x80,7
    00156
    00157   #define SR_TRX_UR 0xf,0x40,6
    00158
    00159   #define SR_RX_END 0xf,0x8,3
    00160
    00161   #define SR_RX_START 0xf,0x4,2
    00162
    00163   #define SR_PLL_UNLOCK 0xf,0x3,0
    00164
    00165 #define RG_VREG_CTRL (0x10)
    00166
    00167   #define SR_AVREG_EXT 0x10,0x80,7
    00168
    00169   #define SR_AVDD_OK 0x10,0x40,6
    00170
    00171   #define SR_DVREG_EXT 0x10,0x8,3
    00172
    00173   #define SR_DVDD_OK 0x10,0x4,2
    00174
    00175 #define RG_BATMON (0x11)
    00176
    00177   #define SR_BATMON_OK 0x11,0x20,5
    00178
    00179   #define SR_BATMON_HR 0x11,0x10,4
    00180
    00181   #define SR_BATMON_VTH 0x11,0xf,0
    00182
    00183 #define RG_XOSC_CTRL (0x12)
    00184
    00185   #define SR_XTAL_MODE 0x12,0xf0,4
    00186
    00187   #define SR_XTAL_TRIM 0x12,0xf,0
    00188
    00189 #define RG_PLL_CF (0x1a)
    00190
    00191   #define SR_PLL_CF_START 0x1a,0x80,7
    00192
    00193 #define RG_PLL_DCU (0x1b)
    00194
    00195   #define SR_PLL_DCU_START 0x1b,0x80,7
    00196
    00197 #define RG_PART_NUM (0x1c)
    00198
    00199   #define SR_PART_NUM 0x1c,0xff,0
    00200     #define RF230B_PART_NUM (2)
    00201
    00202 #define RG_VERSION_NUM (0x1d)
    00203
    00204   #define SR_VERSION_NUM 0x1d,0xff,0
    00205     #define RF230B_VERSION_NUM (2)
    00206
    00207 #define RG_MAN_ID_0 (0x1e)
    00208
    00209   #define SR_MAN_ID_0 0x1e,0xff,0
    00210
    00211 #define RG_MAN_ID_1 (0x1f)
    00212
    00213   #define SR_MAN_ID_1 0x1f,0xff,0
    00214
    00215 #define RG_SHORT_ADDR_0 (0x20)
    00216
    00217   #define SR_SHORT_ADDR_0 0x20,0xff,0
    00218
    00219 #define RG_SHORT_ADDR_1 (0x21)
    00220
    00221   #define SR_SHORT_ADDR_1 0x21,0xff,0
    00222
    00223 #define RG_PAN_ID_0 (0x22)
    00224
    00225   #define SR_PAN_ID_0 0x22,0xff,0
    00226
    00227 #define RG_PAN_ID_1 (0x23)
    00228
    00229   #define SR_PAN_ID_1 0x23,0xff,0
    00230
    00231 #define RG_IEEE_ADDR_0 (0x24)
    00232
    00233   #define SR_IEEE_ADDR_0 0x24,0xff,0
    00234
    00235 #define RG_IEEE_ADDR_1 (0x25)
    00236
    00237   #define SR_IEEE_ADDR_1 0x25,0xff,0
    00238
    00239 #define RG_IEEE_ADDR_2 (0x26)
    00240
    00241   #define SR_IEEE_ADDR_2 0x26,0xff,0
    00242
    00243 #define RG_IEEE_ADDR_3 (0x27)
    00244
    00245   #define SR_IEEE_ADDR_3 0x27,0xff,0
    00246
    00247 #define RG_IEEE_ADDR_4 (0x28)
    00248
    00249   #define SR_IEEE_ADDR_4 0x28,0xff,0
    00250
    00251 #define RG_IEEE_ADDR_5 (0x29)
    00252
    00253   #define SR_IEEE_ADDR_5 0x29,0xff,0
    00254
    00255 #define RG_IEEE_ADDR_6 (0x2a)
    00256
    00257   #define SR_IEEE_ADDR_6 0x2a,0xff,0
    00258
    00259 #define RG_IEEE_ADDR_7 (0x2b)
    00260
    00261   #define SR_IEEE_ADDR_7 0x2b,0xff,0
    00262
    00263 #define RG_XAH_CTRL (0x2c)
    00264
    00265   #define SR_MAX_FRAME_RETRIES 0x2c,0xf0,4
    00266
    00267   #define SR_MAX_CSMA_RETRIES 0x2c,0xf,0
    00268
    00269 #define RG_CSMA_SEED_0 (0x2d)
    00270
    00271   #define SR_CSMA_SEED_0 0x2d,0xff,0
    00272
    00273 #define RG_CSMA_SEED_1 (0x2e)
    00274
    00275   #define SR_MIN_BE 0x2e,0xc0,6
    00276
    00277   #define SR_AACK_SET_PD 0x2e,0x20,5
    00278
    00279   #define SR_AACK_I_AM_COORD 0x2e,0x8,3
    00280
    00281   #define SR_CSMA_SEED_1 0x2e,0x7,0
    00282
    00283 #define RADIO_NAME "AT86RF230B"
    00284
    00285 #define RADIO_PART_NUM (RF230B_PART_NUM)
    00286
    00287 #define RADIO_VERSION_NUM (RF230B_VERSION_NUM)
    00288
    00290 #define TRX_CMD_RW           (_BV(7) | _BV(6))
    00291
    00292 #define TRX_CMD_RR           (_BV(7))
    00293
    00294 #define TRX_CMD_FW           (_BV(6) | _BV(5))
    00295
    00296 #define TRX_CMD_FR           (_BV(5))
    00297
    00298 #define TRX_CMD_SW           (_BV(6))
    00299
    00300 #define TRX_CMD_SR           (0)
    00301
    00302 #define TRX_CMD_RADDR_MASK   (0x3f)
    00303
    00305 #define TRX_RESET_TIME_US    (6)
    00306
    00308 #define TRX_INIT_TIME_US     (510)
    00309
    00311 #define TRX_PLL_LOCK_TIME_US     (180)
    00312
    00314 #define TRX_CCA_TIME_US     (140)
    00315
    00317 #define TRX_IRQ_PLL_LOCK   _BV(0)
    00318
    00320 #define TRX_IRQ_PLL_UNLOCK _BV(1)
    00321
    00323 #define TRX_IRQ_RX_START   _BV(2)
    00324
    00326 #define TRX_IRQ_TRX_END    _BV(3)
    00327
    00329 #define TRX_IRQ_UR         _BV(6)
    00330
    00332 #define TRX_IRQ_BAT_LOW    _BV(7)
    00333
    00334
    00335
    00337 #define TRX_MIN_CHANNEL (11)
    00338
    00340 #define TRX_MAX_CHANNEL (26)
    00341
    00343 #define TRX_NB_CHANNELS (16)
    00344
    00349 #define TRX_SUPPORTED_CHANNELS  (0x7fff800UL)
    00350
    00351 #define TRX_SUPPORTS_BAND_2400 (1)
    00352
    00357 #define TRX_SUPPORTED_PAGES     (42)
    00358
    00359
    00361 #define RATE_CODE_OQPSK250  (0)
    00362
    00364 #define RATE_CODE_NONE      (255)
    00365
    00366 #endif /* ifndef AT86RF230B_H */