Defines

# board_museII232.h File Reference

Definition of MuseII. More...

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## Defines
#define | BOARD_MUSEII232_H (1)
#define | BOARD_NAME "MuseII 232"
#define | BOARD_TYPE (BOARD_MUSEII232)
#define | DDR_SPI (DDRB)
#define | DDR_TRX_RESET DDRC
#define | DDR_TRX_SLPTR DDRC
#define | DEFAULT_SPI_RATE (SPI_RATE_1_2)
#define | DI_TRX_IRQ() { PCMSK0 &= ~(1<<PCINT1); }
#define | EI_TRX_IRQ() { PCMSK0 |= (1<<PCINT1); }
#define | HIF_TYPE HIF_NONE
#define | HWTIMER_REG (TCNT1)
#define | HWTIMER_TICK ((1.0*HWTMR_PRESCALE)/F_CPU)
#define | HWTIMER_TICK_NB (1000UL)
#define | HWTMR_PRESCALE (8)
#define | LED_ANODE_bp (3)
#define | LED_CATHODE_bp (4)
#define | LED_DDR DDRD
#define | LED_MASK (0x18)
#define | LED_NUMBER (2)
#define | LED_PIN PIND
#define | LED_PORT PORTD
#define | LED_SHIFT (3)
#define | LEDS_INVERSE (0)
#define | MASK_TRX_RESET (1<<PC2)
#define | MASK_TRX_SLPTR (1<<PC0)
#define | NO_KEYS (1)
#define | PORT_SPI (PORTB)
#define | PORT_TRX_RESET PORTC
#define | PORT_TRX_SLPTR PORTC
#define | RADIO_TYPE (RADIO_AT86RF232)
#define | SPI_DATA_REG SPDR
#define | SPI_MISO (1<<PB4)
#define | SPI_MOSI (1<<PB3)
#define | SPI_SCK (1<<PB5)
#define | SPI_SELN_HIGH() PORT_SPI |= SPI_SS; SREG = sreg
#define | SPI_SELN_LOW() uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS
#define | SPI_SS (1<<PB2)
#define | SPI_TYPE SPI_TYPE_SPI
#define | SPI_WAITFOR() do { while((SPSR & (1<<SPIF)) == 0);} while(0)
#define | TIMER_INIT()
#define | TIMER_IRQ_vect TIMER1_COMPA_vect
#define | TIMER_POOL_SIZE (4)
#define | TIMER_TICK (HWTIMER_TICK_NB * HWTIMER_TICK)
#define | TRX_IRQ 0x00
#define | TRX_IRQ_bp (PB1)
#define | TRX_IRQ_DDR (DDRB)
#define | TRX_IRQ_INIT() do{ PCICR |= (1<<PCIE0); } while(0)
#define | TRX_IRQ_PIN (PINB)
#define | TRX_IRQ_PORT (PORTB)
#define | TRX_IRQ_vect PCINT0_vect

## Detailed Description

Definition of MuseII.

The wiring of the radio and the ATmega88PA is shown below:

       Fuses/Locks:
         LF: 0xd2 - 8MHz internal RC Osc.
         HF: 0xDF
         EF: 0x01

    Bootloader:
        Start at byte=...., address=....., size = 4096 instructions/ 8192 bytes

image latex

## Define Documentation

#define BOARD_NAME "MuseII 232"

current board name

#define BOARD_TYPE (BOARD_MUSEII232)

Build Options

#define DDR_SPI (DDRB)

DDR register for SPI port

#define DDR_TRX_RESET DDRC

DDR register for RESET pin

#define DDR_TRX_SLPTR DDRC

PORT register for SLP_TR pin

#define DI_TRX_IRQ | ( |  | ) | { PCMSK0 &= ~(1<<PCINT1); }

disable TRX interrupt

#define EI_TRX_IRQ | ( |  | ) | { PCMSK0 |= (1<<PCINT1); }

enable TRX interrupt

#define HIF_TYPE HIF_NONE

Type of the host interface.

#define LED_ANODE_bp (3)

LED anode bit position

#define LED_CATHODE_bp (4)

LED cathode bit position

#define LED_DDR DDRD

DDR register for LEDs

#define LED_MASK (0x18)

MASK value for LEDs (msb aligned)

#define LED_NUMBER (2)

number of LEDs for this board

#define LED_PIN PIND

PIN register for LEDs

#define LED_PORT PORTD

PORT register for LEDs

#define LED_SHIFT (3)

SHIFT value for LEDs

#define LEDS_INVERSE (0)

= 1, if low level at port means LED on

#define MASK_TRX_RESET (1<<PC2)

PIN mask for RESET pin

#define MASK_TRX_SLPTR (1<<PC0)

PIN mask for SLP_TR pin

#define NO_KEYS (1)

if defined, no KEYS are connected

#define PORT_SPI (PORTB)

PORT register for SPI port

#define PORT_TRX_RESET PORTC

PORT register for RESET pin

#define PORT_TRX_SLPTR PORTC

DDR register for SLP_TR pin

#define RADIO_TYPE (RADIO_AT86RF232)

used radio (see const.h)

#define SPI_DATA_REG SPDR

abstraction for SPI data register

#define SPI_MISO (1<<PB4)

PIN mask for MISO pin

#define SPI_MOSI (1<<PB3)

PIN mask for MOSI pin

#define SPI_SCK (1<<PB5)

PIN mask for SCK pin

#define SPI_SELN_HIGH | ( |  | ) | PORT_SPI |= SPI_SS; SREG = sreg

set SS line to high level

#define SPI_SELN_LOW | ( |  | ) | uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS

set SS line to low level

#define SPI_SS (1<<PB2)

PIN mask for SS pin

#define SPI_WAITFOR | ( |  | ) | do { while((SPSR & (1<<SPIF)) == 0);} while(0)

wait until SPI transfer is ready

#define TIMER_INIT | ( |  | ) |

Value:

    do{ \
            TCCR1B = 0; \
            OCR1A = HWTIMER_TICK_NB; \
            TCCR1B |= ((1<<WGM12) | (1<<CS11)); \
            TIMSK1 |= (1<<OCIE1A); \
        }while(0)

#define TRX_IRQ 0x00

interrupt mask for GICR

#define TRX_IRQ_INIT | ( |  | ) | do{ PCICR |= (1<<PCIE0); } while(0)

configuration of interrupt handling any edge triggers PCINT1

#define TRX_IRQ_vect PCINT0_vect

interrupt vector name